International Seminars of Frontiers in Materials Science UPM-CIE Moncloa

INTEGRATION OF SEMICONDUCTORS III-V/ High-K DIELECTRIC AS AN ALTERNATIVE FOR THE MANUFACTURE OF NEW GENERATION OF TRANSISTORS

12/12/2012

Title: Integration of semiconductors III-V/ High-K dielectric as an alternative for the manufacture a new generation of transistors.

Date: Monday 17th December at 09:30

Place: E.T.S. Civil Engineering, basement 1

Speaker: Marcos Benedicto Córdoba

Free admission



Summary

The standard transistors based on Si, which fulfill the function of canal in the devices, and transistors which are based on SiO2 and that work as a gate oxide are materials that, for over 40 years, have satisfied the required demand by the industry.

Now, we are approaching the physical limit of the SiO2, referred to the thickness of the gate oxide that is why they must be replaced by materials of higher dielectric constant, such as the high permittivity dielectric, or high-k dielectrics.

The inclusion of high-k as gate oxides along with III-V semiconductors as a canal of devices would allow us the manufacturing a new generation of transistors of higher performance and smaller size. However, the II-V/high-k integration is a trouble due to the anchor the Fermi level at the interfaces III-V/high-k.

An alternative to solve these issues is the application of the epitaxial lateral overgrowth, (ELO) over high-k/III-V substrata nanostructured.



Further information and contact details:
Dr. José Ygnacio Pastor, Organizer and Coordinator Scientific
Department of Material Science. Universidad Politecnica de Madrid
E.T.S. Civil Engineering, First Floor. Profesor Aranguren Road, E28040–Madrid
T. (+34) 913 366 684. F. (+34) 913 366 680. jypastor@mater.upm.es

Tag: Materials for the Future    Source: Universidad Politécnica de Madrid

Event date:

17/12/2012